Instruction Set and Assembly Language

There are a number of variants of the RedCode assembly language and instruction set available on the web. The one that will be used in this project is derived from the MIPS instruction set, a register-to-register RISC language. Every instruction in this RedCode is specified by a single 32-bit word, broken up into fields indicating the opcode and its arguments. For details on the binary representation of instructions and their syntax and semantics, refer to the MIPS assembly language instruction guide (separate handout and web resources).

The RVM for the DCoreWars game does not need to implement the entire MIPS instruction set. In particular, it need not handle the floating point instructions or any of the other special coprocessor instructions. The RVM MUST support at least the instructions given in Table 1 in Appendix A and the system calls given in Table 2 in Appendix A.

In addition, the RVM MUST support a set ``extended'' instructions that are specific to this project and are not part of the standard MIPS instruction set. Each of these instructions displaces one of the existing MIPS instructions that will not be implemented in the RVM, employing the same bit representation as the standard MIPS instruction. The extended instructions are specified in Table 3 in Appendix A.

The assembly language is not required to support the more sophisticated features of common MIPS assemblers such as conditional assembly, pseudoinstructions, directives, pragmas, etc., but the design team may choose to implement some such features if they desire. All such features MUST be documented in the design and user documentation.